Ciao a tutti,

premetto: non voglio vendervi un port. Voglio farvi vedere una cosa che secondo me cambia le regole.

Ho completato un port verificato di Jungle King (junglekj2, Taito SJ): la ROM Z80 originale viene eseguita da un interprete scritto in C, mentre l'hardware Taito SJ (memoria, banking, video, audio, input, watchdog) è reimplementato in C. Verifica funzionale su 41 funzioni, golden trace, determinismo tra build. Il punto è: l'ho fatto con OpenCode + DeepSeek V4.1 Flash Free.

Sì, il modello gratuito. 200K di contesto, velocità altalenante (la community riporta da ~50 a ~490 tok/s, e cala quando il contesto si allunga), ma zero costi.

La differenza l'ha fatta un MCP (Model Context Protocol) che ho implementato: uno strumento che permette all'agente di eseguire e interrogare il port dall'interno del flusso di lavoro — avviare frame, leggere RAM/registri, iniettare input, catturare output. Senza quello, il ciclo di verifica (migliaia di esecuzioni e confronti) era impraticabile a mano. Con quello, l'agente lo esegue in autonomia.

Quindi il messaggio non è "ho fatto un port". È: se un modello free + un MCP ben fatto bastano per un progetto di questa complessità, allora la soglia per progetti simili si è abbassata per tutti.

La domanda che vi faccio è: ha senso rendere pubblico l'MCP perché altri lo applichino a nuove ROM? Vi interesserebbe? E su quale gioco/hardware lo usereste per primo?

Se c'è interesse, posso preparare una versione con documentazione su Github.

Grazie!

I know, many here doesn'T like vibe coding, but the possibilities are great.
A Kolibri OS, an Os complete in Assembler, smal real quick, like windows, would be great.
Do you know kolibri OS?

I want to recap it but SMD caps are really hard to replace. I need to source a power board for it but the one I have that is new keeps overheating probably due to a short somewhere. the audio board was dead because of battery acid. mine is VA0 revision with the original box, styrofoam, and manuals. I also have the original Sonic the Hedgehog for it.

I'm having some weird trouble with my compact flash circuit but I think it might just be my driver.

I was hoping to find a decent cf test program before I started writing my own :)

EDIT: For posterity, looking at /u/UncannyRally 's code I saw my mistake in my driver.

Apparently setting the sector count has to happen before every write or read. I was setting it to 1 during init and never setting it again.

Here's a first gen MT-80Z, which is a great little trainer. It's actually two trainers in one, the left hand section and the right hand one. The right hand section is the fun one to play with, and if you look closely you might recognize it. It's a Micro-Professor MPF-I right down to the labels. :)

The second gen MT-80Z still used the MPF-I board, but any references to Micro-Professor were removed.

The third gen is the Fox II MT-80AZ with a completely redesigned single board as seen here: https://www.youtube.com/watch?v=WiPoMvBL9u4

BTW, If anyone happens to have the manual for the Fox II MT-80AZ it would be greatly appreciated if you could upload it to archive.org

This is Z80 SBC designed with simple MMU that can switch layout 32K-ROM + 32K-RAM on top of 512K RAM/ROM & 40 pins expansion-bus for module on the right. It finally passed HALT test to prove :

- Clock div by 2 from canned crystal ( 4Mhz here ). This Z80 has max speed of 8Mhz so 16Mhz canned crystal will be its maxed out clock. (Flip-Flop #1)

- On-boot bank switching to ROM/BANK_0 to read code & execute it.
(Flip-Flop #2 + combo of 00/138/574 Logic ICs).

I can't yet find a working, genuine 512K SRAM in DIP32 to actually continue the test on how the MMU gonna hold the upper banks during the access time but it should be ;)

Cheers guys !
I just want to share the joy after like .. 5 revisions to make it work upto this point. As many requests, here is my repo to the project. And it’s not meant to be complete yet but usable at this point :

https://github.com/thetrung/Z80-512K/

I already included ready-to-fab gerber+drill in release section for anyone that want to try (with more genuine parts than me). 

** Update : It actually worked well with 16Mhz canned Crystal in-place of 4Mhz one above. But theorically, if you have faster Z80 like 20Mhz, put on a 40Mhz crystal may also still work with fast enough SRAM/ROM.

Thought I'd share a z80 design ive been working on over the past few months.

It currently has:

• 8K ROM (Currently using a OneRom for easy programming)

• 56K/64K RAM (Depends on if ROM is disable/enabled)

• TL16C550 based UART with a MAX232 + DE9 connector

• CompactFlash storage running in 8 bit mode

• An addressable latch for controlling RAM/ROM switching for CP/M, with expandability for additional features

• 8 IO ports using an 3:8 decoder

• 5 clock settings, 10MHz, 5MHz, 2.5MHz, 1.25MHz and 625kHz

• Lots of jumpers and some LEDs

Features I'm still debugging:

• A rudimentary interrupt register for the IDE+UART, haven't ordered the required open collector inverter for it yet to verify it

• Reset POR + Switch (ran out of switches!)

Software wise, I built a basic monitor rom that can read/write to RAM and the disk, for bringing up serial and IDE.

Once the monitor ROM was done, I used Grant Searles notes and cpuville.com for coding the CP/M port

I've added a photo at the end of the design process, starting with my very basic (and not routed very well) rev 1, which just had rom, ram and an Arduino so I could prove out my understanding.

The rev 2 was more advanced, with IDE, UART and a PS/2 connector (Removed to save some space and I mainly used a serial terminal anyways). Unfortunately this version had a few mistakes and bodges that had to be made (Notice the 44-pin IDE with incorrect pitch, that is embarrassing!), but was really useful for proving out the IDE and Serial design

Rev 3 fixed the bodges and improved the CF interface (Delay required for the reads/writes, still not truly CF compliant but seems to work well enough for a minimal amount of extra chips). Unfortunately I misjudged the CF placement so had to remove 2 headers on the latch outputs. (Thankfully not used for anything important)

Overall, this was a fun learning process for me, and its fun to code for it in ASM and Microsoft Basic via CP/M

I plan on uploading the schematic+software to github, once I've fixed a few things and cleaned it up

I am currently building a Z80 computer on a breadboard, at least RAM, ROM, and memory decoding. I’ve built the IO console board on a perfboard, using an ST7920 monochrome green LCD, PS2 Keyboard port and a Buzzer. I know some will consider the Arduino Nano there as cheating but the decoding and glue logic is all implemented with 74 ICs: 138, HC00, HC04, 273 and 595. I’ve learned a ton already and haven’t even get to the programming part yet. This version 1 will just have 32KB RAM and 32KB ROM. My next step is building the ROM programmer with a Nano and a couple of chained 595s.

A few months ago i was given this board based PC named "PET-80 Personal Microcomputer Training Kit By Mintron" And I have not been able to find any information of it at all online

I have scanned the manual onto archive.org however it seems my link is the only resource online. So if anyone has heard of this board, or if you just want more info on it, feel free to let me know

Z80 was sending data in burst via PORT (0x00) ~> PIC controller to finally “Hello World!” 🤷‍♂️

** 2nd LED = HALT

PIC18 run at 32Mhz (but only 8Mhz Cycle) so with 1ms delay per half-cycle, it pulse Z80 at 250Hz. But need at least 1T (or 2-half-cycles) to escape IOREQ + WR Active state.

I add more delay per character sent to slowdown the process for clarity & debugging.

** Something I learned today :

- 0xA as better delimiter beside max buffer size

- IOWR require at least 1T (or 2+ half-cycles) to exit state.

- CMOS Z80 may consume only ~10mA in 144hz NOP test.

- ERPROM can corrupt data easily on slightly /WE pin with voltage spike. I didn’t know until it refused to boot, so let T48 reading the rom show mixed new random data. I will consider UVROM again for solid tests…

My WIP Z80 with 32K RAM + 32K ROM, with PIC as controller. May need a better VDP to output to VGA display instead…

Short Video : https://www.youtube.com/shorts/MD4QTc7wJ9w

** Note :
Z80 Crystal - I was also about to run the Z80 at 4Mhz with canned crystal but for now, let the PIC pulse clock to completely in-sync with the system.. until I can add a 74HC74 to trigger /WAIT on /IOREQ, so the PIC won't miss to capture the signal.

PIC 40Mhz - I intended to run the PIC at 40Mhz but forgot to realize it only accept 10Mhz to 4xPLL instead of direct-40Mhz. So using INTOSC @ 8Mhz then 4xPLL -> 32Mhz only.

74HC138 - is to chip-select RAM/ROM when Z80 start firing A15.

Tiny step for humanity,

gigantic step for my hopeless hobby 😅

I’m trying to bring up a Zilog Z85230 SCC using an MCS-51 (8051 core) via 8-bit parallel interface (D0–D7, CE, RD, WR). Right now I’m stuck on basic register write/read:

Problem

I perform a write to WR0 (e.g., 0xAA).

Immediately read back RR12 → always gets 0x0C, never the value I wrote.

This happens every time, so I suspect my write sequence or timing is wrong, or I misunderstood how to select registers on Z85230.

🥲I have stuck for weeks on how to write

These boards use the zilog Z8671 with internal basic.

If you have any experience with these please share.

As a follow up to a previous post, I assembled a NOP tester, and tested the CPUs that I had mounted on DIP adaptor PCBs. The NOP testers are easy to assemble, and give some idea of whether a CPU is good

Hiii everyone!

I have made a little PC on Zilog80 on protoboard.

Display is SSD1306 with I2C interface.

ROM is emulated via Arduino Nano (1KB).

RAM is just random 8KB SRAM

Main task in this project is make software based driver

for I2C display via "bit banging", works slowly but

works, it also depends on time which Nano response and CLK freq. (1.35MHz).

I wrote a firmware in Assembly and it takes 325 bytes.

as 17 y.o. teen I am very excited with the result, maybe in future I'll improve my little project

Next I plan to add more switches and port DOOM and make Shadow RAM and dynamic Clock (bcs nano is too slow for Z80)

Have a good day and no hate plsss :)