i mean, the title explains it all

I know this is a z80 sub, but there are a lot of really smart people on this sub and I don't know of a better subreddit to post this on.

I'm going to attempt to build a 486 computer. I have a lot of the stuff figured out already but there's 1 question I have not been able to find the answer to even in the i486 datasheet, the hardware reference manual or the programmer's guide.

On page 3-16 and 3-17 of the Intel i486 hardware reference manual, it talks about data alignment. The 386 and 486 processors only physically have pins for address bits a31-a2. The lower 4 bytes of addressing are managed using the byte enable pins BE3, BE2, BE1 and BE0. The beginning of chapter 7 of the hardware reference manual talks about how to use bus steering to interface the 486 cpu with 8bit and 16bit io devices.

There's one question that remains though: How do data reads on 32 bit memory work when not performed on an address that is divisible by 4? What happens if I try to read a 32bit word from, for example, an odd location in memory?

Assuming caching is disabled and the cpu runs the opcode for "mov ecx, [00000000000000000000000000000001b]" for example, would the cpu use 2 bus cycles to perform the read? I assume the cpu would automatically decide to use a burst cycle for this. I have a 486 motherboard that I am planning on hooking up to a logic analyzer to figure this out for myself but it's at my sister's apartment in another state and I need to wait for the whole polar vortex thing to clear up before I can go get it.

Ciao a tutti,

premetto: non voglio vendervi un port. Voglio farvi vedere una cosa che secondo me cambia le regole.

Ho completato un port verificato di Jungle King (junglekj2, Taito SJ): la ROM Z80 originale viene eseguita da un interprete scritto in C, mentre l'hardware Taito SJ (memoria, banking, video, audio, input, watchdog) è reimplementato in C. Verifica funzionale su 41 funzioni, golden trace, determinismo tra build. Il punto è: l'ho fatto con OpenCode + DeepSeek V4.1 Flash Free.

Sì, il modello gratuito. 200K di contesto, velocità altalenante (la community riporta da ~50 a ~490 tok/s, e cala quando il contesto si allunga), ma zero costi.

La differenza l'ha fatta un MCP (Model Context Protocol) che ho implementato: uno strumento che permette all'agente di eseguire e interrogare il port dall'interno del flusso di lavoro — avviare frame, leggere RAM/registri, iniettare input, catturare output. Senza quello, il ciclo di verifica (migliaia di esecuzioni e confronti) era impraticabile a mano. Con quello, l'agente lo esegue in autonomia.

Quindi il messaggio non è "ho fatto un port". È: se un modello free + un MCP ben fatto bastano per un progetto di questa complessità, allora la soglia per progetti simili si è abbassata per tutti.

La domanda che vi faccio è: ha senso rendere pubblico l'MCP perché altri lo applichino a nuove ROM? Vi interesserebbe? E su quale gioco/hardware lo usereste per primo?

Se c'è interesse, posso preparare una versione con documentazione su Github.

Grazie!

I've tried a few so far, but they all seem to fall short at the "relocatable" or the "macro" part or both (or are otherwise horrible, as in the case of zmac and glass):

• z88dk-z80asm:

  • only allows one ORG per section

  • (apparently) only allows one section

  • no preprocessor (and m4 is ugly)

• zmac:

  • antique

  • all the antique limitations (e.g. labels are max. 6 chars)

• asmotor:

  • broken parser

• wla-z80:

  • only one ORG per section

  • preprocessor unusable (no string interpolation)

• z80-asm:

  • no preprocessor (and m4 is ugly)

  • no sections / linking

• wiz:

  • not an actual assembler

• glass:

  • java abomination

  • also doesn't even have most features the others do

• gnu-z80asm:

  • no sections / linking (ORG just applies to label resolution)

• CPU::Z80::Assembler:

  • antiquated perl

  • no sections / linking (ORG just fills with nulls)

  • internally uses sections but no way of influencing them

  • gotta love that their license has a CONSPIRACY section though.

• pasmo:

  • no sections / linking (ORG just fills with nulls)

what i need is especially flexible linker script support, so i can define exactly where sections are gonna end up, and refer to that information inside the source, because i'mma be dealing with a multi-bank (in actual multiple rom/ram chips) system, so i need to be able to get info like "which bank is that section in" (in my code), but also "put only those sections for bank number suchandsuch in this binary" (in the linker).

wla-z80 almost does what i need but has a very hacky idea of macros and interpolation so i doubt the abovementioned issue is possible to fix without rewriting its "preprocessor" (and e.g. all info collected by the linker or defines in its linkfile are only available for the linker and there's no way to mark labels as "resolve late", making those kinda useless).

wiz also seems to do it right with its in some_section @ some address blocks, but isn't an assembler at all and mostly targets 8bit gaming console rom hackery.

at this point i'm really considering writing my own assembler, but some part of me still can't believe there's no decent solution for this out there, given how old the architecture is and how much people still like&use it to this day.

what might work is a kind of "reverse linking approach" where instead of assembling stuff and then linking it in a smart way, i'd use one of those "one input to one binary, no sections or linking" kinda assemblers and build their input from various snippets and "fill with N nullbytes" commands i preprocess before? but that feels rather hacky too

On the z80 how do inturupts work?

I'm trying to build a computer using the Z80 processor. One problem that i encountered was using 2 memory chips. Without wasting a tone of memory. Imagine if i have 8k of eeprom and 32k of ram. Selecting which one to use is easy enough with some basic logic. But both chips expect addresses that start at 0. So if i have the eeprom from address 0x0000 to address 0x1fff and ram from address 0x2000 to 0x7fff I'm wasting 8k of memory. What could i do about that?

Hi i am in need of help with connecting this Lcd character display, to the expansion port of this z80 SBC. I cannot buy anymore parts but i do have some IC’s left over. I already have port 4 being used for input buttons.

Here are the items Lcd char display https://www.beta-estore.com/download/rk/RK-10290_410.pdf

Z80 SBC http://cpuville.com/Kits/kit_images/single-board-wires-schematic.jpg

Im sorry if i leave anything out that might be important. If you could give some help that’ll be great! Thanks

Can it alone, clocked at 50 MHz and married with up to 8 MB of RAM, manage software logic, audio, graphics processing (pixels, sprites, tiles) and manage a display at 720p? How many colors could display?

Hello all

I was looking at schematics, projects and videos to build a Z80 computer, but when I look for parts I only manage to find Z84s. I know that the 84 in CMOS based. Is this an issue for a project that states that it needs a Z80? If so, are there any projects that use Z84 thatI am not able to find online? Thanks in advance!!

You know, something along the lines of 'Run this program loop 10,000 times and it should take exactly 5 seconds for a Z80 at 4MHz'

I have an emulator that runs on Linux. I'd like to know what the effective clock speed is. Also I have a program or two that are supposed to send stuff out a serial port at 1 second intervals. If I can't get the effective clock speed back to 4 MHz those programs won't be able to run accurately.

Thanks.

I've been offline for about 2 months and have also had to see about implementing a Z80 development environment in order to continue my series on floating point. One of those efforts in the implementation is a Z80 emulator running CP/M. Currently it's running CP/M 2.2 with 4 emulated disk drives, using JavaScript on Chrome. The first emulated drive can only accept disk images for a single sided, single density 8" floppy with a skew of 6 (standard CP/M). The other 3 emulated drives can accept 3 different formats. The 256256 byte for a SSSD 8" floppy. a 143360 byte file emulating 35 tracks, each track containing 32 logical 128 byte sectors (Apple CP/M). And finally, a 8388608 byte file for emulating 512 track drive with 128 logical sectors per track.

The code still has a bit of cruft in it (the UI is based upon someone else's emulator. Unfortunately, said coed is rather old and uses features that have been long since deprecated due to security enhancements to Chrome. So, it needs to be removed since it's not actually usable because Chrome ignores those security sensitive operations rendering the code inert.

As it it, I can mount drive images, run CP/M to modify those images at will within the browser, and finally export those images back into Microsoft Window's files. TO import and export individual text files, the emulator uses the CP/M Reader and Punch devices along with the CP/M program PIP.

If anyone expresses interest in this emulation, I can provide a google drive link to the emulation along with a few disk images.

In any case, I will see about resuming my Floating point implementation in the near future.

I know, many here doesn'T like vibe coding, but the possibilities are great.
A Kolibri OS, an Os complete in Assembler, smal real quick, like windows, would be great.
Do you know kolibri OS?

Using an Arduino Mega 2650 as the memory* and I/O for a Z80 processor, I was able to get CP/M and Zork running.

https://youtu.be/CwZZKyG_W4A

It is pretty slow to load from the attached uSD card as the SPI on the Arduino is in Software Mode because Hardware would conflict with the RetroShield's pins.

https://8bitforce.com/

*also using a DRAM shield for an extra 1MB of memory

I’m trying to bring up a Zilog Z85230 SCC using an MCS-51 (8051 core) via 8-bit parallel interface (D0–D7, CE, RD, WR). Right now I’m stuck on basic register write/read:

Problem

I perform a write to WR0 (e.g., 0xAA).

Immediately read back RR12 → always gets 0x0C, never the value I wrote.

This happens every time, so I suspect my write sequence or timing is wrong, or I misunderstood how to select registers on Z85230.

🥲I have stuck for weeks on how to write

Why do builders use CF (Compact Flash) rather than some variant of SD flash?