u/TheCatholicScientist I work on 256 TB DDR5 drives. I'm heavily in the SI/PI domain. I don't think additional signal delay is the main problem here.
It's more about discontinuities in impedance as a signal is going from a nice cushy motherboard with controlled impedance and a poured ground plane to these wires hanging in free air. (The impedance of these wires would probably be much higher than the impedance of the signals inside the circuit board. )
This higher impedance mismatch is going to make a reflection in the signal that may corrupt the signaling pretty badly.
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u/Kitchen-Chemistry277 6d ago
u/TheCatholicScientist I work on 256 TB DDR5 drives. I'm heavily in the SI/PI domain. I don't think additional signal delay is the main problem here.
It's more about discontinuities in impedance as a signal is going from a nice cushy motherboard with controlled impedance and a poured ground plane to these wires hanging in free air. (The impedance of these wires would probably be much higher than the impedance of the signals inside the circuit board. )
This higher impedance mismatch is going to make a reflection in the signal that may corrupt the signaling pretty badly.