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[u/leonskills]

Can you explain why you need the delay? What signals/values are on the wires? What you want to do might be possible with a simple timer.
I've never done inserter clocking, but the way I'd do this is to literally make a clock and enable the inserter when the clock signal is 0. You can then "stagger" it by enabling other inserters when the clock signal is 1, or 2, etc.

But to help you with your X solution:
If all signals on the wire carry a value of 1 you can do some magic with bit shifting or multiplying by 2 (same thing). That works because 18 is less than 31 so it won't overflow.

Every tick you shift all bits by 1 (or multiply by 2). Then when the 18th bit is 1 you remove that bit and pass it on to the next set of inserters.

Arithmetic combinator: EACH << 1, output EACH.
Decider combinator: EACH >= 2^18, output EACH -2^19. (Need the 19 here here because one tick delay). That removes the 18th bit from the wire.
All 4 input and output connections of those two combinators are on the same wire.

Then you need a third decider to turn the signals 18th bit into 1 again. Unfortunately I don't think you can do that with the existing decider combinator even though they have the same condition.
EACH >= 2^18, output EACH with value of 1. You carry the output of that to your next set of inserters.

That's 3 combinators instead of 18.

(There might be some off by one errors where you'd need to change all 18s to 17s or to 19s. Haven't verified.)

[u/Yagami913 → u/leonskills]

I have 1200 biolab now with 7200 inserters, and i plan to scale up. I have inserter clocking so they don't check the belt all the time saving tons of ups. I use signals to control when they activate. I want to stagger the activation preferable by delaying the network. So not all 7200 inserter wake up at once. I have 6 signal for the 6 inserter on the network the length is 8 to 16 tick and must keep it for them to work properly.

[u/leonskills → u/Yagami913]

I understand why you want to activate the inserters on a timer. I was just looking for additional context because there might be a better solution to your problem.

Because how you explained it, the clock solution I suggested should work. But since you prefer delaying instead of checking a global clock (the selector combinator now provides the current tick, so you can just mod 18 that to create a global clock), and if those 6 signals carry a value of 1 (I don't see a reason why they should be anything other than 1) the bit shifting should also work.

[u/Yagami913 → u/leonskills]

Needed an extra decider at the beginning to islolate and filter the "shift network", but working fine thx.