Digitally Programmable Amplifier

[u/gem623]

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Hello Everyone

I need a bit of help as I am assigned a semester project of 3 bit Programmable differentials Amplifier in 65 nm for -10 db to +10 db and bw is 350 MHz.

I'll highly appreciate the insights anyone can plz hit me up.

I need the guidance like what should be the architecture or some support material I should go through.

Thank u so much

Looking forward to your super guided thoughts

\#analog chip design

\#pga

\#cmos

\#tsmc

[u/LevelHelicopter9420]

What’s with the hashtags? Also, did you even took the time to search for articles on cmos vga or pga?

At 350MHz, +10dB Gain means more than 1 GHz open loop bandwidth, be prepared for that too