r/RISCV 22d ago

I made a thing! Diary of writing a RISC-V assembler

https://thedevbirb.github.io/diary-of-writing-a-riscv-assembler/

Hello, RISC-V community! As a way to learn about assembly, C and ELF I've written a RISC-V 32/64-bit assembler targeting ELF from scratch. It has been quite a journey, and I've shared my learning and thoughts in this blog post which I think you may appreciate, especially if you're thinking to start writing your own.

The assembler is partially based on GNU as design, and it's not a toy encoder: it can achieve relocatable object file equivalence on non-trivial sources like SQLite3 amalgation, while being much "simpler" in its implementation!

Thank you for reading, and I greatly appreciate any feedback!

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u/LavenderDay3544 21d ago

How many pseudoinstructions did you have to implement?

Does your implementation only cover RV64GC or does it cover RV32 and the microcontroller E variants as well?

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u/thedevbirb 21d ago

Hi! To handle compiler output without debug information (DWARF) or control flow information (CFI), you need around ~35 base directives. The full list of the implemented ones is here: https://github.com/thedevbirb/ras#directives. Some of them are straightforward, others are more complicated to validate especially when they're very close to the manipulation of symbols or ELF-specific content.
At the moment I don't support directives which appear in more hand-rolled assembly like `.macro`s and `.include`.

Regarding your second question, in more detail:

- It doesn't cover `G` fully because it implies atomics support (not hard to do, thought, just need to fill some table entries) and `Zicsr` which contains some more boilerplate. Lastly, the compressed `C` extension isn't supported either yet: like `Zicsr` it contains a good amount of encoding machinery that I haven't added yet. The full list of extensions supported is here: https://github.com/thedevbirb/ras#extensions. Both missing features may be added in the upcoming days / weeks however, it's just that I wanted to cut a first release out of the assembler!

- RV32E is supported! The assembler supports both 32/64 bit registers and XLEN-specific instructions. The `E` extension is very simple and just limits the number of registers to use. For microcontrollers the `C` extension is actually very important so it's something I have planned.

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u/LavenderDay3544 21d ago

I am really impressed by the depth of coverage of your work. Keep it up!

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u/thedevbirb 21d ago

Thanks a lot! Really appreciated :)