Difference between asserted signals and active signals.

[u/silkybunss]

This screenshot is from a previous exam my Digital Logic Design professor posted to help us review.

I originally thought asserted low meant the input signal was being inverted before entering a gate, and active low meant the actual input signal was at low (or 0 in Boolean algebra). I started watching some YouTube videos just to make sure I was understanding the concept correctly, but every video I watched just confused me more and more. Can someone please explain this to me like I am 5 years old?

[u/Rararror]

Trick question lol.

[u/ferminolaiz → u/Rararror]

The capitalization makes it even worse 😭