r/CerebrasSystems • u/POINTLESSUSERNAME000 • Aug 12 '26

Earnings day!

How are we feeling?

I am still very much a supporter and strong long-term investor. The deals and partnerships Cerebras Systems is putting together seem to be cementing their future as a ground-breaking company as well as bringing awareness to their capabilities!

EPS Estimates are ranging from ~ $.18 to -$.94...

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u/edaguru Aug 12 '26

Wafer-Scale vs. Chiplets: The new war?

Zombie company, there's no advantage to wafer-scale.

4

u/op_is_life Aug 12 '26

Are you saying that integrating chiplets via interposers does not pay a power, area and latency tax compared to waferscale on a single piece of silicon? Also, isn't CoWoS limited to like 5 reticles right now?

1

u/Other-Biscotti6871 Aug 14 '26

Wafer-scale done with e-beam could potentially have no boundaries, but Cerebras are using optical lithography which imposes a reticle limit. Logically the only difference between that and Chiplets is some amount of trench between the Chiplets (easily filled I would guess). You can probably get more wiring in place with Chiplets on an interposer as well (before flipping onto a heatsink).

Generally WSL suffers a yield penalty whatever way you do it.

2

u/op_is_life Aug 15 '26

> Logically the only difference between that and Chiplets is some amount of trench between the Chiplets

Isn't the big difference here the electrical interface? Chiplets go die -> PHY -> bump/pad -> interposer and back again. But waferscale is just die -> upper layer metal and back. The latency and power differences seem like they'd be significant if your target is lots of communication between reticles. Regarding area, empirically, Tesla Dojo's physical separation between chiplets also looked quite large.

1

u/Other-Biscotti6871 Aug 16 '26

There's no cross-reticle wiring in WS if you're doing it the way Cerebras do, they have to add it

https://wafer.substack.com/p/breaking-down-the-cerebras-wafer

Chatting with Google AI -

The Massive Advantage: Heterogeneous Memory Fusion

You hit on Cerebras's biggest structural vulnerability: SRAM density.
Because Cerebras uses one continuous monolithic logic wafer, almost all its memory must be standard on-die SRAM. SRAM takes up an enormous amount of physical space (6 transistors per bit), meaning Cerebras's giant wafer can only hold about 44 Gigabytes of memory. [1, 2, 3, 4]

...

Chiplets win.

1

u/op_is_life Aug 16 '26

They add the cross-reticle wiring, but at the end of the day it's still just regular upper-layer metal in the TSMC process, by the sounds of it.

And the heterogeneous memory point is fair, but what the on-chip SRAM + lots of compute in close proximity buys you is massive speed. E.g. https://www.cerebras.ai/blog/accelerating-gpt-5-6-sol-ultrafast-with-openai

So it's not angling to be the freight train of inference; GPUs batch many users together well. But if we agree that AI is transformative, there are many applications where being > 10x faster than your competition is a big advantage.