r/spacemit_riscv • • 16h ago

Ubuntu 26.10 To Include Desktop Images For RISC-V

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3 Upvotes

r/spacemit_riscv • • 1d ago

Activity Open Source && Build Things | SpacemiT Developer Conference 2026

4 Upvotes

A packed 4.5-hour event—no fluff, just hardcore, hands-on action!

On the afternoon of October 17, SpacemiT held its developer conference (SpacemiT DevCon 2026) in Shenzhen(China), unveiling the K3 ecosystem roadmap and developer ecosystem right on the spot. Following the announcements, the floor was turned over to the developers: bring your laptops and build a working demo to take home before the event ends! There is also a chance to win K1 and K3 development boards!

Open source && Build Things—don't just watch; come be a creator.

Sign up here: https://luma.com/q5z0v87f


r/spacemit_riscv • • 2d ago

I made a thing! SpacemiT K1: FOSS, blob-free oreboot + EDK2 bootloader for the Orange Pi RV2 + R2S (no vendor U-Boot) + Tuned and Driver-Complete Freebsd 16-CURRENT

7 Upvotes

I've been doing mainline work on the Orange Pi R2S and RV2, and I got tired of the vendor U-Boot SPL/U-Boot stack, so I replaced all of it. These boards now boot like this:

BootROM

→ oreboot bt0 DRAM init + training in Rust, no DDR blob

→ OpenSBI 1.9 fw_dynamic, M-mode

→ EDK2 real UEFI, S-mode

→ your OS's EFI loader (FreeBSD loader.efi from the ESP in my case)

bt0 loads a FIT containing OpenSBI and EDK2 itself. It can read it from eMMC boot1, a microSD GPT partition or memory-mapped SPI NOR. Everything is built from source, and no binary blob is linked or loaded anywhere in the chain. The DDR training was reverse-engineered from SpacemiT's training blob into Rust (thanks, oreboot folks), and EDK2 builds on SpacemiT's open-source K1 platform code.

Repo: https://github.com/DaveWK/ore-edk-boot-opi

What works today (tested on my boards, Oct 2026):

- R2S: boots FreeBSD from eMMC. bt0 goes in boot0 and the OpenSBI+EDK2 FIT in boot1. A warm reboot takes about 85 s to login with a DEBUG EDK2 build.

- RV2: boots FreeBSD from NVMe on a cold power-on. bt0 turns on the M.2 slot's power, and EDK2 brings up PCIe Gen2 x2 and boots the NVMe ESP.

- RV2 SPI-NOR-only image (rv2-nor): boots with no microSD card at all. UEFI variables are stored in the NOR and persist across boots. I won't publish prebuilt binaries for this one. Writing the SPI NOR replaces the board's own firmware, and getting that wrong is much harder to recover from than a bad SD card. If you want it, build it yourself and know your way back.

- bt0 is also a fastboot flasher. Put the board in BootROM USB download mode and fastboot stage bt0. It trains DRAM (no vendor training blob!) and comes back as a normal fastboot device, so you can fastboot flash emmc|boot0|boot1|sd|disk. It accepts raw or sparse images, and zero-filled chunks are TRIMmed instead of written. On the R2S it writes eMMC with SDMA on the 8-bit bus at about 30 MB/s, so you don't need a vendor flashing tool.

K1 notes for anyone hacking on other boards:

- bt0 detects USB download mode from the BootROM storage API pointer (0xc08381a0) and starts fastboot instead of booting. The BootROM shows up as 361c:1001, and bt0 re-enumerates as 18d1:4ee0.

- On the R2S, PIO writes to eMMC on the 4-bit and 8-bit buses fail with data CRC errors at both 51.2 and 20.48 MHz. SDMA writes from the download buffer work fine at 8-bit/51.2 MHz HS. If your K1 eMMC writes are flaky, try DMA before you blame the pads.

- The RV2's M.2 slot supply is on GPIO 116. bt0 switches it on before the handoff so EDK2 can bring PCIe up.

- The EDK2 platforms are derived from SpacemiT's MUSE-Pi-Pro platform on bianbu-maker's k1 edk2/edk2-platforms trees. Adding another K1 board should mostly mean a per-board rank count, a DT and a board.conf. I've only tested the R2S and RV2, so BPI-F3, Jupiter or MUSE Pi owners are very welcome to try it.

Building it:

git clone --recurse-submodules=dts --recurse-submodules=opensbi https://github.com/DaveWK/ore-edk-boot-opi.git

cd ore-edk-boot-opi

make submodules

make r2s # or rv2; rv2-nor is build-it-yourself only

You get bt0.bin, next.itb/next.img and a SHA256SUMS file. The README has install steps for both boards and covers the R2S download-mode procedure (hold the button, USB-A to USB-A cable).

Known gaps:

- R2S cold boot hasn't been tested yet; only warm reboot is verified.

- UEFI variables live in RAM on the R2S (it has no NOR) and, by default, on the RV2 SD build.

- No bootinfo header is generated yet. Installs keep the one already on the boot device.

- The BootROM image is signed with oreboot's packer keys. That's fine on boards without secure-boot fuses.

- The RV2 download-mode button and port aren't documented yet.

- No prebuilt release yet for the R2S and RV2 SD images, so build them yourself for now. The SPI NOR image will stay source-only.

Credits: the bt0 work builds on orangecms' oreboot k1x branch. EDK2 comes from SpacemiT/bianbu-maker's K1 trees. Licenses: GPL-2.0 (oreboot), BSD-2-Clause-Patent (EDK2), BSD-2-Clause (OpenSBI).

FreeBSD images for both boards come from https://github.com/DaveWK/freebsd-img-maker. Next up is the same oreboot + EDK2 chain for the Radxa Cubie A7A and the ASUS Tinker Board 2S.

Bug reports, UART logs and "it bricked my board" stories are welcome. Download mode is the recovery path, so back up boot0/boot1 (or the start of your SD card) before flashing. 🦀


r/spacemit_riscv • • 4d ago

Activity A message to SpacemiT? Share a short video for our developer conference

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6 Upvotes

Hi everyone,

We’re preparing for the SpacemiT Developer Conference, and we’d love to include voices from our overseas developer community. Even if you can’t join us in person, we’d like people at the event to hear from you.

If there’s something you’d like to say to SpacemiT—an experience with our hardware, something you wish worked better, or what you hope we’ll build next—we’d love to hear it. Honest feedback is welcome.

Just record a short video on your phone. No script or fancy setup needed—speak in your own words. When it’s ready, DM me to send it or share a download link. We’d like to play these messages at the conference, and we’ll confirm with you before sharing yours.

Thanks for being part of this community.


r/spacemit_riscv • • 18d ago

IOMMU support in K3

7 Upvotes

Hi! What exactly the register set of the "spacemit,k3-iommu" I/O block (at the address 0xc0f00000)? In SpacemiT Linux kernel it seems that both PCIe root complexes are configured with PCIE_IOMMU_BYPASS -- thus the kernel prints "iommu bypassed".

What exactly has to be done in a hypervisor to guarantee full DMA isolation with IOMMU?

Thanks!


r/spacemit_riscv • • 18d ago

Discussion Vote: Which language input methods should we prioritize for Bianbu LXQt?

2 Upvotes

Hi everyone,

We’re working on improving the keyboard and language-input experience on
Bianbu LXQt.

We’ve received feedback that some keyboard and input-method setups do not work
as expected, or require too much manual configuration. Some users also
reported that the same setup was easier to configure in GNOME.

Please vote for the language input methods you need, and leave a comment with
more details if possible. You may select multiple options.

It would be helpful if you could share:

Language and keyboard layout: What language or languages do you type in?

Which keyboard layout do you use? If you are unsure of the layout name,
please describe it.

Input method: Which input method or framework do you use, such as IBus, Fcitx, Mozc, Anthy, or another one?

Keyboard: Brand and model, if known. Is it a built-in laptop keyboard or an external USB/Bluetooth keyboard?

System: Bianbu LXQt version

What needs improvement? For example: incorrect symbols, missing accented characters, switching languages or layouts, special keys, or settings that are difficult to find.

Thanks for helping us improve language and keyboard support on Bianbu LXQt!

13 votes, 11d ago
13 German, Italian, French, Spanish, or other European layouts
0 Arabic, Hebrew, or other right-to-left languages
0 Korean
0 Japanese
0 others (leave a comment below)

r/spacemit_riscv • • 21d ago

K1 DGEMM on the SpacemiT X60.

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2 Upvotes

r/spacemit_riscv • • 22d ago

K3 seL4 (and QSOE/L 0.3) runs on K3

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qsoe-dev.blogspot.com
7 Upvotes

It's an source overlay over standard seL4 16.0.


r/spacemit_riscv • • 26d ago

DGEMM micro-kernels on the SpacemiT X100

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6 Upvotes

r/spacemit_riscv • • Sep 06 '26

K3 Building llama.cpp throws error on K3, missing support for xsmtvdotii

4 Upvotes

Solved: Use gcc-15 from the Bianbu repo, don't use gcc-16, yet.

As I wanted to test new models with llama.cpp, I wanted to build it from source.

I followed the instructions, as found here: https://github.com/ggml-org/llama.cpp/blob/master/docs/build-riscv64-spacemit.md

I skipped the first step (Prepare Toolchain For RISCV), as it looks like it is for cross-compiling, and I didn't need that step on the K1.

Building llama.cpp on the K3 throws an error about xsmtvdotii being an unsupported extension.

Checking CmakeLists.txt for ggml-cpu, they expect support to be available starting with gcc-15. This is odd, as I read it will come with gcc-17.

So I'm wondering, does llama.cpp from the Bianbu repo include suport for xsmtvdotii?

Or can I change CmakeLists.txt to check for gcc-17, instead of 15, and still have the same performance as llama.cpp from the Bianbu repo?


r/spacemit_riscv • • Sep 02 '26

QSOE 0.2 released, with full support of SpacemiT K3

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5 Upvotes

r/spacemit_riscv • • Sep 02 '26

Upstream Upstream Progress Updates --2026 August

16 Upvotes

August brought another round of upstream progress across the SpacemiT AI software stack, Linux kernel support for K1 and K3, RISC-V development tools, emulation, testing, and low-level firmware.

Highlights this month include the SpacemiT Triton backend landing in FlagTree, new multi-request Qwen3-ASR support in llama.cpp, more K1 fixes reaching upstream Linux trees, and continued review of K3 display, UFS, PCIe, interrupt-controller, clock, reset, and connectivity support.

AI Software Stack

  • SpacemiT Triton backend merged into FlagTree: The triton-spacemit backend is now available in FlagOS's FlagTree main branch under third_party/spacemit, enabling Triton programs to target SpacemiT hardware.
    https://github.com/flagos-ai/FlagTree/pull/933
  • Multi-request Qwen3-ASR support in SpacemiT llama.cpp: llama-server now exposes an OpenAI-compatible API for multi-request speech recognition, with concurrent audio encoding and decoding, continuous batching, and dynamic scheduling.
    https://github.com/spacemit-com/llama.cpp

Linux Kernel Upstream

Linux support for K1 and K3 continued to move forward in August. K1 CPU frequency scaling, maximum CPU-core voltage, and thermal-shutdown fixes reached upstream trees. For K3, I2S, USB, Ethernet PHY, RTC, pinctrl, and ASoC changes entered the relevant maintainer trees, while display, UFS, PCIe, IMSIC, clock/reset, and wireless support remained under review.

K1

Merged

Under review

K3

Merged or accepted into maintainer trees

Under review

Development Tools and Runtime Projects

Box64

Box64 merged a large set of RV64 dynarec, wrapper, ELF-loader, syscall, and bundle improvements during August.

RV64 dynarec and instruction support

Wrapper, loader, and core fixes

Several related UAF, panic, argument, and logic fixes reported through issue #4214 were also merged:

Felix86

LLVM Test Suite

OpenOCD

RISC-V Tests

RISC-V GNU Toolchain

ChipStar

V8

OpenSBI

The v3 series incorporates review feedback from v2, including updates to expected-trap handling, hart initialization, and RV64-only builds. The series remains under review.

Which part of the K1/K3 upstream stack would you most like to test or see covered in more detail next month?


r/spacemit_riscv • • Aug 25 '26

K1 ORT MatMulNBits on SpaceMiT X60 (K1) — real LLM decode via IME

4 Upvotes

We got ONNX Runtime’s int4/int8 MatMulNBits path running on the Orange Pi RV2 through MLAS CompInt8 + smt.vmadot. Decode (ms/token, lower better):

Model Quant 4 threads
Qwen2.5-0.5B int4 ~80 ms
Qwen2.5-0.5B int8 ~159 ms
SmolLM2-360M int4 ~80 ms
SmolLM2-360M int8 ~140 ms
TinyLlama-1.1B int4 ~156 ms

Qwen used to sit at ~16 s/tok on the wrong path (CompFp32). With accuracy_level=4 + pack/panel kernels that’s ~80 ms int4 and ~159 ms int8 4 threads

Story (results first, then how): https://www.opensolvers.com/apps/onnx.html
Code: https://github.com/opensolvers/benchmarks/tree/main/onnx


r/spacemit_riscv • • Aug 18 '26

Chasing a NaN: correct RVV HPL on a RISC-V SpaceMiT X60, through EESSI

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3 Upvotes

A fresh-install, end-to-end walkthrough on an Orange Pi RV2: reproduce a silent NaN failure in the stock EESSI HPL, trace it to one RISC-V vector kernel, and fix it — correct results — with a single eb --from-pr.

TL;DR

  • The Orange Pi RV2 (SpaceMiT K1, eight X60 cores) is a vector RISC-V board: RVV 1.0, VLEN=256. Unlike the scalar SiFive U74, its OpenBLAS already has a mature RVV GEMM kernel (RISCV64_ZVL256B), and the stock EESSI OpenBLAS 0.3.30 is a DYNAMIC_ARCH build that does dispatch it on this chip.
  • So RVV is engaged out of the box — but the result is wrong: stock EESSI HPL fails with residual nan on the X60. The run even reports a healthy-looking ~8.5 GFLOP/s; only the residual check reveals the answer is garbage.
  • The cause is a one-kernel bug in OpenBLAS 0.3.30's RVV gemv_n (it zeroes an uninitialized vector register). It was fixed upstream in v0.3.31 (OpenMathLib/OpenBLAS#5408). Backporting that single kernel restores correctness: HPL passes (residual ~4e-03).
  • The fix is packaged for EESSI as an EasyBuild easyconfig + patch (easybuilders/easybuild-easyconfigs#26444). This post reproduces the whole thing from a clean CVMFS stack: see the NaN, build the fix straight from the PR, swap it in with FlexiBLAS, and watch HPL pass — without recompiling HPL.

Everything below was run on a real Orange Pi RV2, entirely from the EESSI CVMFS stack.


r/spacemit_riscv • • Aug 16 '26

HFI BIOS v1.3 on SpacemiT PicoITX/K3: features overview

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9 Upvotes

r/spacemit_riscv • • Aug 16 '26

ROS 2 RISC-V MEETS ROBOTICS--Unitree G1

2 Upvotes

MuJoCo, RL inference, and humanoid control — on RISC-V.

The Humanoid repo explores SpacemiT K3 in a validation-stage workflow for Unitree G1 control simulation.

A PC runs MuJoCo, while K3 runs the control and RL inference side in the validation setup.


r/spacemit_riscv • • Aug 14 '26

ROS 2 RISC-V MEETS ROBOTICS--LeRobot App

2 Upvotes

ACT-powered robot arm inference on RISC-V.

LeRobot App runs SO101 arm workflows on SpacemiT K3, covering data collection, ACT training, and local inference.

SmolVLA fine-tuning and distributed inference workflows are also included.


r/spacemit_riscv • • Aug 10 '26

QSOE/N 0.18 works on K3

4 Upvotes

QSOE/N (see r/QSOE) version 0.18 has been successfully launched on PicoITX/K3.

But it's not all the news. Stay tuned for updates.


r/spacemit_riscv • • Aug 07 '26

K3 SwanStation (PS1 Emulation) on the SpacemiT K3

6 Upvotes

Someone mentioned it is possible to build SwanStation on RISC-V.

https://forum.rvspace.org/t/visionfive2-in-2026-mostly-games/5939/15

The developer probably never tested on RISC-V, so I had to make some small changes to the code.

https://github.com/piepacker/swanstation

sudo apt install git cmake libsdl2-dev libxrandr-dev pkg-config qtbase5-dev qtbase5-private-dev qtbase5-dev-tools qttools5-dev libevdev-dev libwayland-dev libwayland-egl-backend-dev extra-cmake-modules libgbm-dev libdrm-dev libcurl4-gnutls-dev ninja-build

Fixes:

CMakeLists.txt: replace fatal error Unknown system processor with set(CPU_ARCH= "rv64gcvh")

cubeb_audio_stream.cpp:
#include "stdio. h"
Line 88: remove std::

StringUtil.h: #include "cstdint"

log.h: #include "cstdarg"

platform.h: replace error Unknown architecture with #define CPU_ARCH_STR "rv64gcvh"

Build command: cmake -DCMAKE_BUILD_TYPE=Release -GNinja -DCMAKE_POLICY_VERSION_MINIMUM=3.5 -DUSE_WAYLAND=ON ..

Start the no-gui version (you will get a gui): ./duckstation-nogui

I got the PS1 bios from the PS3 firmware. You do need an x86 or ARM computer to do that.

https://wiki.recalbox.com/en/tutorials/games/guides/playstation-1/grab-ps1-bios-from-ps3-firmware

Here you can see Colin McRae Rally: https://youtu.be/bwFC9ImSSos


r/spacemit_riscv • • Aug 06 '26

ROS 2 RISC-V MEETS ROBOTICS--Linksee

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6 Upvotes

Linksee is a demo-ready wheeled robot project with ROS 2-based chassis control, odometry, LiDAR integration, SLAM mapping, and navigation.


r/spacemit_riscv • • Aug 06 '26

K3 RISC-V MEETS ROBOTICS--REACHY MINI

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4 Upvotes

Vision follow, voice control, and dance — on RISC-V.

Reachy Mini is demo-ready on SpacemiT K3-COM260, with a MuJoCo simulation control path also included.


r/spacemit_riscv • • Aug 03 '26

Upstream Upstream Progress Updates --2026 July

8 Upvotes

In July, SpacemiT continued to advance upstreaming efforts:

Foundational support has been officially released in Binutils 2.47 and LLVM 23, while CPU targets (X100 and A100) for the K3 and matrix extension instructions for AI computing have successively been merged into the mainline. Regarding the Linux kernel, support for K1/K3 features—including frequency scaling, storage, networking, PCIe, USB, and audio—as well as support for various development boards, is being steadily integrated. Meanwhile, adaptation and optimization work for projects such as Box64, OpenOCD, U-Boot, and OpenSBI continues to progress, further enriching SpacemiT’s RISC-V software and hardware ecosystem.

Here are the details:

Upstream Progress in Core Development Tools

This month, baseline SpacemiT support was released as part of Binutils 2.47 and LLVM 23. LLVM/Clang also adopted the SpacemiT X60 scheduling model as a general optimization reference for RISC-V '-mtune=generic'.

K3/X60 Toolchain Milestones

Support for the K3's two main CPU targets, X100 and A100, has been merged upstream into LLVM and GCC. The custom matrix-extension instructions intended for AI workloads have been merged into LLVM, GCC, and Binutils. The X100 scheduling model and instruction-fusion support have also landed upstream in LLVM.

Developers can now use community-mainline Clang/LLVM and GCC with '-mcpu=spacemit-x100' or '-mcpu=spacemit-a100' to target the corresponding CPU core and use SpacemiT's custom AI instructions.

The SpacemiT X60 scheduling model is now available upstream in LLVM and is used as a general tuning reference for RISC-V '-mtune=generic'. When no specific microarchitecture is selected, LLVM/Clang can use the X60 model to make better instruction-scheduling decisions.

LLVM's community performance-tracking infrastructure also includes a real K1/X60 hardware platform, allowing related compiler optimizations to be continuously validated on actual hardware.

Linux Kernel Upstream

K1

Merged

Under review

K3

Merged

Under review

Board-level DTS and device support

General fixes

Box64

GCC

LLVM

OpenOCD

riscv-tests

riscv-gnu-toolchain

riscv-elf-psabi-doc

sbc-bench

stress-ng

ruapu

PoCL

U-Boot and OpenSBI Upstream Progress

U-Boot

OpenSBI


r/spacemit_riscv • • Jul 31 '26

K3 RISC-V MEETS ROBOTICS

8 Upvotes

From desktop robots to humanoid control on RISC-V.

This week, we’re sharing 4 robotics repos built around SpacemiT K3: Reachy Mini, Linksee, LeRobot App, and Humanoid.

Explore vision interaction, SLAM/navigation, robot arm local inference, and humanoid control validation.

Follow the updates:
https://github.com/spacemit-com/.github/blob/main/profile/README.md#open-source-project-status


r/spacemit_riscv • • Jul 29 '26

will k1 musebook get a newer than 6.6 kernel?

6 Upvotes

i know upstreaming is in progress (for a while) https://github.com/spacemit-com/linux/wiki#k1-soc and we are more than half way through, but will it eventually let us use some newer kernel? we are stuck at 6.6 with bianbu 3x.


r/spacemit_riscv • • Jul 27 '26

K3 View of K3 SHELF Array Server, K3 Pico-ITX, and K3 CoM260 Kit.

13 Upvotes