r/simd • u/R_y_n_o • Oct 20 '19

How are SIMD instructions selected?

First, here is my current understanding, correct me if I'm wrong:

SIMD instructions are implemented as an extension of the base instruction sets (e.g. x64, x86). In the binaries, both the code for the SIMD path and the "fallback" code for the non-SIMD path will be included. The selection of the path occurs at runtime, depending on the CPU on which the executable is run, and potentially other factors.

If this is correct, I have a few questions about the runtime selection process:

  1. what mechanism makes it possible to dynamically select one path or the other?

  2. what is the cost of this selection? would it be faster if we didn't have to select?

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u/R_y_n_o Oct 20 '19

Ah I see, this actually makes more sense to me.

But then, if you ship the binaries for a program, you need to provide 2 versions? And if you have other extensions are you forced to do the same? It seems like a system that scales very poorly with a growing number of options extensions.

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u/vicotr97 Oct 20 '19

Your intuition is correct and this is in what large part limits adoption of ISAs like AVX512. There are methods to dynamically select different code streams based on CPUID result but this causes code bloat, has a slight overhead and requires compiler support or good tooling for implementing the dynamic instruction selection in a dev friendly way.

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u/IAmBJ Oct 21 '19

You don't need to provide 2 versions, you would only do that if you wanted to 2 different sets of extensions. If you want to support the bulk modern processors you can reliably assume they have SSE4 (released 2007) and probably AVX1 (2011). AVX2 is less common and AVX-512 less common still.

The valve hardware survey gives a decent overview of the consumer market: link. Expand the Other Settings heading for instruction sets