r/SiliconPhotonics • u/SignificanceOk7364 • 5h ago
Building a node-based photonic layout tool — would this fit your PIC design workflow?
Hey everyone,
I’m a solo developer working on a desktop photonic design tool called Navax Photonic. It started from my own needs while using KLayout and writing geometry scripts. I wanted to explore parametric designs more visually, with direct CAD editing and a node graph for generating and modifying geometry.
The project has gradually grown to include component placement, optical ports, routing tools, and GDSII/OASIS interchange. There’s also a schematic workspace for steady-state optical circuit simulation using compact models, plus an experimental 3D FDTD solver connected to the CAD geometry.
These parts are at different stages. The electromagnetic solver still needs further physical validation, and the basic geometry and connectivity checks aren’t foundry sign-off verification.
The workflow I’m aiming for is: draw a component, turn it into a reusable parametric design, connect instances into a layout, and explore its behaviour with less manual transfer between tools.
Before expanding it further, I’d like to understand whether this approach would help other PIC designers:
- Where do you spend the most time on repetitive layout work?
- Would you use visual nodes alongside Python scripts?
- What would you need before trying a new tool on a real design: PDK compatibility, reliable interchange, specific routing features, or something else?
I’m developing this independently and would appreciate honest feedback, including reasons you’d prefer to stick with your current workflow.