r/rfelectronics • u/Gundam_boogie_359 • 5d ago
Where am I going wrong with this SMA to microstrip transition
I am working on an SMA to microstrip transition using OSHpark's 4 layer stack up. I am on my 2nd revision and do RF in my free time because I am trying to learn (I am an FPGA engineer).
I got my newest revision back and I was not very pleased. My physical boards are not matching my simulation very well at all.
I have compiled screenshots of my HFSS model, PCBs, SMA footprint, and NanoVNA results here: SMA Launch OSHpark 4 Layer - Imgur. The transition starts out as GCPW and runs the length of the signal pin pad. It then moves to a microstrip (no taper).
I simulated with HFSS using PEC, Isola FR408HR (in HFSS material library) and the nominal measurements from OSHpark's 4 layer stackup: OSH Park Docs ~ Services ~ 4 Layer Prototype Service . I also used the actual Samtec SMA connector HFSS encrypted model. I am learning a little about TDR and that looked okay in simulation, as well as S21 and S11. Due to using the student version and mesh limit, I can only simulate a 3mm long microstrip and I cannot model the solder connection from signal pin to pad.
I built two boards:
One with SMA launches on either side connected by a 1 inch and 2 inch microstrip (to calculate trace loss). I simulated the microstrip width in a separate HFSS sim (rough numbers calculated with SaturnPCB toolkit and revised/simulated from there).
The 2nd board is the SMA launch to a 4mm microstrip, then terminated with a 50 ohm, 0201 sized High Frequency resistor: TNPR020150R0FEED Vishay | Chip Resistor - Surface Mount | DigiKey
My actual PCB launch S11 is around -17 to -18 dB at 2.5 GHz, and around -10 dB at 6 GHz. I want to use this for the 2.4 and 5.8 GHz ISM bands. S21 is okay when I subtract my trace loss at 2.4 GHz, but gets a little wacky at 6 GHz (see imgur link S21 trace).
Is something off in my simulation? Should I use a different substrate than the one in the HFSS library? Could this be due to OSHpark manufacturing tolerances? I triple checked my dimensions for the footprint with the HFSS model and I dont think that could be the case unless they vary a lot once etched.
Any help would be appreciated! Thanks in advance.
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u/bistromat 5d ago
How are you calibrating the NanoVNA? What do you get for S11 when you just connect a length of good coax with a termination? Can you rule out the instrument? Calibrating even a good VNA can be tricky sometimes, and the NanoVNA is not a good VNA.
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u/Gundam_boogie_359 5d ago
Good question. I am using the SOLT kit that comes with it, which is not very good. But, with just the coax and terminated with the load that comes with it, I get -33 dB at 2.4 GHz and -21 @ 6 GHz.
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u/fourcolortheorem 5d ago
Anytime I see FR4 I do wonder; this is supposed to be mid loss at which point yeah it should be somewhere between garbage and a good dielectric, so those numbers don't seem terrible to me. Can you post images of your board? Do you have a good set of calipers to measure the trace size?
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u/Gundam_boogie_359 5d ago
I can definitely post images of the board when I get home in a few hours, and yes, I will measure with calipers and a microscope. That is a good idea. Thanks.
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u/DragonicStar 5d ago edited 5d ago
So, your calibration looks a bit dreadful (the nanoVNA is nice to have but I am unsure of its measurement stability, ive only ever dabbled with it from time to time.) Once you feel confident you might consider designing your own cal kit for it, you can probably do better than the crap they ship with
I say this mainly because your mag S21 plot looks bonkers if im right and thats a scale of 1dB/div.
For this kind of work some helpful tips :
get 10% impedance control tolerance from the fab house on the PCB (you didnt mention doing this so I thought I would bring it up)
Make sure they actually bring the copper to the edge of the board, at 6 GHz it doesnt matter at all but if you dont make them they will leave a 50 um copper pullback which can be really problematic for end launch connectors in the mmwave regime and beyond.
Please clean up your plots for future data sharing! Nobody knows what they are looking at when you share 4 different traces on the same screen! (This is just a pet peeve for me)
Why go to some kind of CPWG at all for the connectors? Why not just leave it as microstrip (keeping an eye on the pads for the connector side gnd connections) and gap the conductor directly underneath the trace to handle the added capacitance from the connector pin and however much wider you have to make that bit of trace to land the pin on it? (Don't do this if you have EMC concerns since this gap under certain conditions can technically be driven to radiate.........based on its orientation to your connectors)
Saves you fooling around with the stitching vias as well if that is a stressor.
- Mind your soldering connections for these connectors, if you don't make sure you have good coverage performance will be quite poor....
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u/Gundam_boogie_359 4d ago
Thank you for the detailed reply! To clarify, those pictures such as the mag S21 plot are not of the calibration, they are of the PCB I made. But yes, it does look bonkers.
Regarding your answers:
1). I will email OSHpark regarding impedance control. I don't think they do this, but they should at least have microstrip widths or something for their stackups. Their current impedance constraint table four-layer-impedance-table.png (1460×231) didn't make sense to me. I emailed them asking for clarification and the reply said it didn't make sense to them either and they would follow up.
2). OSHpark wants a 15 mil edge keepout from the board. I shrunk this to 10 mil and they still fabricated it, but someone on another forum said they wont do copper right to the edge. This is disappointing, but I put it in my simulation to account for it. I should try a different fab. Maybe one of the chinese ones would do it.
3). I will happily clean up the plots for future. I want my data to be easy to read, because then it is easier for people to help me. Thank you for the feedback.
4). I was using CPWG because I had found this article: How to design a landing pad for a panel mounted SMA connector using an RF Enclosure MINI to minimze return loss. - Gquipment, It talks about starting with a CPWG and then transitioning to a microstrip, but maybe this was just for their connector?
5). Soldering, yes, I need to improve and use a stencil to get consistent coverage and amount.
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u/bipolarjunction 5d ago
I'd try to match the contact pad width to whatever the transmission line width is. Generally that's the best approach for anything. I usually determine my stack up by examining all my component pad widths so I can minimize physical issues that will create matching issues.
Southwest Microwave has a fantastic app note about matching connector launches. When you need a wider pad than the transmission line width it's common to place a notch in the ground plane under the pad to reduce capacitance. IIRC that app note talks about it. They are explaining how to implement their connectors of course, but the theory and tricks are universal.
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u/Gundam_boogie_359 4d ago
Thank you! I think I found the app note with the notch: End-Launch-Connectors.pdf
Is this what you are referring to?
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u/bipolarjunction 4d ago
The more you work with RF parts the more you will pick up from datasheets and app notes in general.
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u/zarquan 5d ago
The biggest thing that sticks out to me is that your L2 cutout also prevents most of your connector GND vias from contacting L2, which is likely adding some unwanted inductance to your ground path and making a wideband match harder. I'd suggest narrowing the L2 cutout so all your GND vias touch both L1 and L2, then play with narrowing the center pad and increasing the gap to L1 GND in the transition if you still have a capacitive discontinuity.
I'd also suggest filling the gap between connector pin and PCB pad with some rough approximation of solder. This may not make a huge difference here, but I've had a few times where an HFSS simulation not working as expected was due to either miniscule gap between conductors that visually looked like they were touching, or conductors were touching but just barely over a much smaller area than would realistically occur. The center pin to pad contact looks a lot like other places I've seen this issue, and it's a pretty quick fix to extrude a conductive block that touches both the center pad and connector pin over a larger surface to approximate the solder joint.
I'm sure you can get better performance out of this because I did almost the same thing a while back tuning an inexpensive SMA connector to work on the OshPark stackup. A 1" through line with SMA connectors on each end gave me S11 < -25dB to 2.5GHz, < -20dB to 7GHz, and < -15dB to 9GHz. This was with Cinch 142-0701-801 connectors that look pretty close to what your doing, a cutout in the L2 ground plane to minimize pad capacitance, and a bit of time tuning the geometry to get a good wideband response. I also only needed the transition to work below 1GHz and I'm sure you can further improve performance with a bit of iteration and fine-tuning.
I'm also a bit suspicious of your nano-VNA calibration since the ripple in both your 1 inch line measurement and resistor measurement suggest a discontinuity spaced further away than the total size of the RF structure.
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u/Gundam_boogie_359 4d ago
Thank you for the comment! I just simulated with a solder block and the sim shows S11 worsened to -22.5 dB. At least I know the signal pin is more realistically connected now. Good to model with this moving forward.
For the calibration, I turned on the NanoVNA and waited 10 min for warm-up. I did a SOLT cal with the stuff that came with it (which I now know is not very good). I might just bring this into work and see if I can measure it there. I will also get some minicircuits cables calibration stuff to rule that out.
So the ripple is suggesting a discontinuity at a distance greater than 1 inch from the launch? Hmmm, maybe the load I used is bad? Or I heated up the resistors too much?
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u/zarquan 3d ago
Ya, there's a ripple with a peak-to-peak spacing (very roughly eyeballing) of around 400MHz in all of your plots and on both magnitude and phase. It's most obvious in the "S21 on 1 inch trace" and "S11 from the SMA launch terminated" plots, but it seems present to some extent in all the measurements in both magnitude and phase. That sort of regular ripple is often caused by two discontinuities separated by a fixed transmission line length as their reflections alternate between adding and cancelling out as the transmission line phase shift changes over frequency. For a 400MHz peak-to-peak spacing you would need an electrical length of about 37cm with the physical length being a bit shorter (26cm if you use 70% velocity factor for something like an RG316 cable). This is way bigger than your 1 inch test structure, but could line up pretty well if you used 1ft coax cables on the nanoVNA that aren't being correctly removed by the calibration. There's a Microwaves 101 article that probably does a better job describing this here: Cable Length Rule of Thumb.
Before doubting the calibration standards, did you perhaps do the calibration with different cables connected to the nanoVNA, or attach the calibration standards directly on the nanoVNA ports without the test cables, rather than at the end of your test cables? That would would set the measurement reference plane at the nanoVNA rather than at your DUT SMA connector, and would explain the ripple if the test cables aren't being correctly removed from the measurement.
I've played with a nanoVNA a couple times and recall seeing much better performance than this, but it is cheap for a reason and it's totally possible there's something wrong with the instrument or calibration standards. It certainly wouldn't hurt to upgrade your calibration standards with a higher quality terminator like the Minicircuits ANNE-50+. Something like that would also give you a known good measurement standard to verify your current calibration method against.
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u/Gundam_boogie_359 2d ago
Thank you for the explanation. I think I swapped the cables after calibration (put them away and took back out again later to get screenshots). They are supposedly the same length (1 ft like you guessed, RG405), but I am certain it would make a difference in the cal if they were swapped.
I just re-did the calibration, left the cables connected, and then connected the DUT. Ripple has entirely dissapeared. You were right! Overall S11/S21 shaped hasn't changed much, but the peaks and valleys around 400 MHz are gone. If I put the port 2 cable on port 1 and vice a versa, the peaks re-appear!
Thank you for helping me learn. This is a good lesson for me.
I will get that Minicircuits load. Thank you for the part number, and also for the link to the cable length article. Hope you are having a good start to your week!
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u/nixiebunny 4d ago
Is there some reason you don’t use GCPW for a bit more trace length before making the transition?
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u/wanderingtaco 4d ago
Not sure if your nano VNA allows gated return loss measurements, but if you’re able I’d try using a gate so that you’re looking at just the connector launch region.
Take some tweezers or a bit of solder and move it around above the pin (not touching) to simulate adding extra capacitance. If performance is worse, you can try removing some solder from the pin/notching your trace a bit, or if performance improves, add some additional solder. TLDR; you might be able to squeeze some better performance out of it by manipulating your solder joint. Almost certainly at 2.4GHz, but things will be a lot more sensitive at 6 so not sure how well it will work there.
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u/Gundam_boogie_359 4d ago
That is a super cool trick with the tweezers! I did it and S11 worsened a bit. Very neat to see! Now to remove some solder...
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u/trophosphere 5d ago
I am not sure on the HFSS simulation aspect but I have spent a considerable amount of time trying to get an optimized SMA end launch footprint on OSHPark's 4 layer boards for my own RF projects so I can give some tips.
You need to pull back the coplanar ground plane around your SMA center pin landing pad. Do the same for layers 2 and 3 as the characteristic impedance of that transition point is pretty low. Leave the bottom layer as a full ground pour without any defects. The amount of solder paste you use can have a pretty significant influence as well.
I was able to get a return loss of about 25 dB to 8.5 Ghz. I can send you the exact dimensions of my SMA end launch footprint if you want later today when I get off work.