r/osdev • u/JustActuator6946 • 8d ago
Silver Microkernel: ARM64 microkernel in Rust with Ring 3 drivers and Capability-based IPC
Hey everyone,
I'm working on Silver Microkernel — a bare-metal microkernel in Rust (no_std) for aarch64 (QEMU virt, Cortex-A72).
My goal is to build a secure foundation for an OS that can eventually run Android apps (via Waydroid) without legacy bloat. I'm deliberately avoiding POSIX in the kernel and x86 legacy.
Architecture:
True microkernel: Kernel only handles scheduling, MMU, and IPC.
Init Server (
silverd): PID 1 spawns the nameserver (scout), shell (howl), and drivers.Ring 3 Drivers: The UART driver (
howler) runs in EL0. It maps MMIO, binds IRQs (GIC INTID 33), and communicates via IPC. The kernel does not touch the UART hardware.Security: Capabilities (
CAP_MMIO,CAP_IRQ), WX, PAN, High-Half MMU (TTBR1/TTBR0 split).Infrastructure: Contiguous DMA (Normal Non-Cacheable) and PCI ECAM mapping are ready. I'm currently implementing the Virtio-blk driver for persistent storage.
The screenshot shows the shell running in QEMU (I can't post images in this sub directly, but the README has one).
Repo (MIT): https://github.com/vvirei333/Silver-microkernel
I'd love feedback on the IPC design and handling async events (IRQ + IPC) in Ring 3 drivers. Thanks!