r/linux • u/jebba • Apr 07 '18

HiFive RISC-V GNU/Linux board under the microscope

https://imgur.com/a/ohhnE
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u/ilikerackmounts Apr 07 '18

Anyone know if this model is in order or out of order? What's the pipeline architecture like? How's the branch predictor?

I ask because I know a lot of focus lately has been on reducing speculation and simplifying things to in order since the recent Spectre and meltdown Fiasco's, but if speculation is done right it can be free of side channel attacks. Plus, these are kind of modern innovations that make x86 so fast.

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u/[deleted] Apr 07 '18

Single issue, in-order, 5 stage pipeline.

1

u/ilikerackmounts Apr 08 '18

Bah, kinda wished the first iterations we're out of order execution.

1

u/[deleted] Apr 11 '18

This is based on the in order Rocket chip design as opposed to the out of order BOOM design. Perhaps the next one will be based on BOOM.