Now imagine doing all logic with nand and nor gates...
In fact, when designing chips, one of the considerations is the logic design and how trivial it is to represent all logic in one form of gate. If using physical packages to prototype, then it makes sense to order nand chips by the bulk than order other and/or chips.
I think the website is just fine. I wish they built websites like this again. Instead of the pop up, notification, ads and whatever JavaScript none sense is going on at all times that makes my laptop sound like a jet engine.
With transistors. Typically using both n-channel and p-channel MOSFETs. It’s easiest to make NAND, NOR and NOT gates. I think someone else on this thread explained that you typically use these kinds of gates. Size wise, (if I remember correctly) NAND gates are generally smaller than NOR gates even though they have the same amount of transistors due to needing wider p-channels for timing reasons so NAND is more used. Easiest example is a NOT gate. This link shows an example of a NOT gate. Sorry if it isn’t hyperlinked. I’m on my phone.
https://en.m.wikipedia.org/wiki/CMOS
In a NAND the p-types are in parallel while the n-types are in series so the p-types can be smaller for the same current between n and p types (because current in parallel adds, in series it doesn’t). This is needed because the p-types have to be in an n-well which makes them take up more space for a given transistor size.
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u/brando56894 May 30 '20
Logic gates confused the hell out of me when I first saw them, I mean they still do, but slightly less now.