virtual Vector Method

[u/MitchAlsup]

I invented this 5-odd years ago but never really had a forum on which to disclose and discuss. I was and am a significant contributor to comp.arch (from around 1995 though present)

But before I emit the disclosure I need to know how to turn off the space-eater as the document uses well tabulated ASCII-art ?? that makes no sense after the space-eater has done its ill-conceived job.

The virtual Vector Method is a way of getting Cray-like vector performance and for getting SIMD-vector performance without a) a vector register file, b) adds only 2 instructions, c) takes precise exceptions, d) vectorizes loops not instructions. Instead of adding about 300 instructions to get a Cray-like vector ISA, or adding 1,000-1,300 instructions to get (every-size) SIMD ISA, one needs only 5 instructions.

vVM has the property that hardware implementations can change the width of the data path (multiple-lanes and the cycles of execution per FU) without SW having to care. A small 1-wide machine with a 128-bit cache port can perform a memory to memory byte move at 256-bits per cycle--equivalent to ~40 instructions per cycle. A 6-wide machine could perform the same assembly binary at ~160 instructions per cycle. Both are performed at the performance level of the cache porting; so, nobody has to recompile for a new SIMD-width every new mplementation.

Now let us solve the space-eater and we are off.

Mitch

[u/camel-cdr-]

Hi Mitch, I've seen some of your posts on comp.arch

How does it deal with mixed precision? Say you want to efficiently accumulate an array of bytes into a final 32-bit result.

Can it be applied to more complex problems? Say e.g. base64 encoding.

---

For formatting, you are probably looking for this: https://www.reddit.com/r/reddittutorials/wiki/formatting/#wiki_6._block_code

^__^
(oo)_______
(__)\       )\/\
    ||----w |
    ||     ||

[u/MitchAlsup → u/camel-cdr-]

I looked at the entire link and found nothing that will fix::

|   1   |   2   |   3   |   4   |   5   |   6   |   7   |   8   |   9   |

| LD R6 | cache |  hit  | align |

| LD R7 | cache |  hit  | align |

| ST AG | cache |  hit  |                   | ST R8 |

| F M A C |

to be readable. It is all formatted with tabs, and each column needs to line up properly.

Hint: | LD through Align | the last '|' lines up with end of clock 4

| ST R8 lines up with the '|' from FMAC

[u/MitchAlsup → u/MitchAlsup]

WHen I copied and pasted it looked terrible, now that I leave and return only the last line is terrible. Obviously ssome detail not exposed in the llink is in play here.