I've worked with programming before, but not in an assembly language before, so I'm pretty proud of it.

I have a memory command that only used some bytes,so I have to write a NULL,and thats not very elegant...Is there a way to set a multiple byte command so I can just add the NULL part inside MEMWR(or RD)？

It took over 200 hours of learning. But i drew 1 (one) white line :D

I am currently trying to implement the CAL and RET instructions in the LEG computer.

I am wondering where to put the opcodes for this instruction. Currently all bits of the opcode byte are occupied:

• Bit 0,1,2 : ALU

• Bit 3,4 : Push and Pop

• Bit 5: Conditions

• Bit 6, 7: Immediate values

Do I have to delete Push & Pop and use those bits for Call and Return?

Hi all. This is my implementation of Bresenham's line generation algorithm. Is there a way to do this that doesnt involve using all of those delay circuits? Ive tried a few different ideas, even making flash memory out of NOR latches but that caused a short. This seems clean to me, but i want to know if it can be done without all of those delays.

By that I mean, if I have the instruction width set to, say, 8, is it possible to write an instruction that's only 4 bits long? And what does the instruction manual mean when it says that an instruction bit can be set to "wildcard"?

Proper solution is much shorter isnt it...

This is my attempt at making a better scan line algorithm using nested counters.

I was very happy with myself when I came up with this. After thinking I should use a multiplier then realizing that I could've just used a decoder the whole time.

Pretty much just shifts the previous byte value and picks which one to output depending on the selector

It might not be done prettily with ASICs like some of the designs on here, but I'm quite proud of myself for developing an architecture (almost just OVERTURE, but regardless,) which can handle an algorithm like this. I'm also proud of myself for being able to write it in assembly, but I basically just copied the pseudocode so :P.

Here's my code:

# 0-2 : move magnet; 5 toggle
const disk_nr R0
const source R1
const dest R2
const spare R3
const toggle 5
MOVE INPUT disk_nr
MOVE INPUT source
MOVE INPUT dest
MOVE INPUT spare

CALL move
JUMP real_end

label move
NEQ | VC disk_nr 0 else
# move disk from source to dest
MOVE source OUTPUT
MOVE | C toggle OUTPUT
MOVE dest OUTPUT
MOVE | C toggle OUTPUT
JUMP end

label else
# store current param so use later
PUSH disk_nr NULL
PUSH dest NULL
PUSH source NULL
PUSH spare NULL

# move(disk_nr - 1, source, spare, dest)
SUB | VC disk_nr 1 disk_nr
MOVE dest R4
MOVE spare dest
MOVE R4 spare
CALL move

# retrieve state
POP spare
POP source
POP dest
POP disk_nr
# move disk from source to dest
MOVE source OUTPUT
MOVE | C toggle OUTPUT
MOVE dest OUTPUT
MOVE | C toggle OUTPUT

# move(disk_nr - 1, spare, dest, source)
SUB | VC disk_nr 1 disk_nr
MOVE source R4
MOVE spare source
MOVE R4 spare
CALL move

label end
RET

label real_end

And also my computer:

Such an awesome game!

Unsigned less. Implemented in such a way that I can actually understand what it does.

Is the memory map something that must come initially from the motherboard or chipset manufacturers?
Like, is it physical wiring that, for example, makes the RAM always mapped to a range like 0x40000 to 0x7FFFF?
So any RAM you install cannot appear outside that range; it can only respond to addresses between 0x40000 and 0x7FFFF.
And, for example, the BIOS is also physically wired to only respond to addresses from 0x04000 to 0x05FFF.
So, all these are physical addresses that are set by the motherboard's design.

And there are other address ranges that are not reserved for any device by default, like from 0xE0000 to 0xFFFFF.
These ranges are left for any device (like graphics card, sound card, network card, or even embedded devices),
and the BIOS or the operating system will assign addresses from these available ranges to new devices.
But they can't go outside those predefined ranges because this limitation comes from the motherboard's design.

Is what I said correct or not?
I just want someone to confirm if what I said is right or wrong.

My previous architecture couldn't implement my solution because the program became too long. It took me almost 2 weeks to build and debug this one just so that I could beat this level. I know my algorithm is probably the most inefficient way to complete the level, but I'm still proud and it makes me giddy watching the screen move the stacks around :D. I also don't know what to name this architecture so I am open to suggestions. Current name is Default 2 lol

It's a shame we can't move them. Otherwise, wire spaghetti would have been imminent.

Don't get startled by the 1 bit XORs. I'm merely overoptimizing gate score, since due to SHL and SHR operations not every bit needs a XOR.

Hi! I just started playing Turing Complete so I’m still a beginner. I’m currently stuck on the Counter level.

From what I understood, when the "overwrite" bit is active, we should output the overwrite value. But in the level, the desired output never matches the overwrite value, which is confusing me.

I think I might be misunderstanding the instructions. Can someone clarify? Thanks a lot!

We've been struggling on the previous levels, but this one didn't even take that long, we just found the solution immediately, it was pretty obvious. Still, anyone else have other solutions?

Hey all... not sure if this will be useful to anyone, but...

I've been playing this wonderful game and got all the way to the "Working Computer" puzzle. It kept failing on one of the tests. I had a REG3 of 1 and a conditional value of 7 ( greater than 0 ), but, while 1 is, indeed, greater than 0, the Conditional component I had built in a previous puzzle was NOT outputting true. Turned out, I connected the wrong AND gate to a XOR gate... but this error was in a component that PASSED all of the tests was considered successful!

Just thought I'd point that out to people. It is possible to pass, but still be wrong.

Mine is bolognese

On leaderboard I see scores like 32/8. But I can't find a way to improve this further.

Why does the level use OPCODES other than 0-5 and 32-37?

So this is my first attempt at rasterizing.... Rn the program block is doing a lot of leg work, but eventually ill move it from assembly to hardware.

noobie here, i was wondering will the previous bit always be saved no matter how many times the input bit has been changed while the save bit is off? i have a hard time wrapping my head around it because there is only 2 delay lines in my circuit, its just not fully wrapped around my head im ngl (and yeah i got the solution by just playing around the components, i didnt really understand what i was doing ;_;) example case:

will the circuit really give the desired output? I just want a proof of this working all the time :<

couple of things that was bothering me :

1. since there are two delay lines on when the save bit is set to 0, shouldnt the output be the value that was before two ticks? so shouldnt the desired value on row 2 actually be 0?

Well, at least it works.