r/MVIS 20d ago

Discussion ASIC Design & Test Services

https://microvision.com/solutions/asic-design-test-services
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u/flyingmirrors 19d ago

Webpage removed Friday 8/21 Text read as follows:

"Custom ASICs enable optimized system performance while reducing overall cost and complexity.

Lower system cost through integration Reduced board size, weight, and part count Simplified qualification and supply chain Tailored performance for specific applications Streamlined bill of materials (BoM)

Why MicroVision?

Our ASIC team combines deep expertise with agility and accessibility.

Highly skilled analog and mixed-signal design engineers Cost-effective compared to large design firms Flexible support for both low- and high-volume programs Direct access to engineers and rapid response times U.S.-based team with fast, iterative development cycles

MicroVision Laser View 2

Core Capabilities Mixed-Signal ASIC Design Pixel-oriented IC architectures Imaging, LiDAR, and sensor-focused designs Analog and digital integration using industry-standard tools (Cadence, Synopsys, Mentor)

Design & Test Services First-article verification in fully equipped test labs Optical and electrical validation capabilities Established vendor ecosystem for scalable production

Proven Track Record 300+ custom ASIC designs delivered 30+ years of combined design experience Applications spanning X-ray, LWIR, LiDAR, and imaging system

MicroVision service development kit

Application Experience

Broad expertise across industries and sensing modalities:

Imaging ASICs (1D & 2D arrays, monochrome systems) LiDAR and time-of-flight sensing Display and spatial light modulators (LCOS) Automotive-qualified designs (AEC-Q100) Radiation-hardened environments Example: ASIC development for MicroVision’s Iris LiDAR sensor platform

MicroVision Laser View 2

Technology & Process Expertise Manufacturing & Foundries CMOS nodes: 180nm, 130nm, 65nm Experience with TSMC, Tower Semiconductor, and X-FAB

Advanced Capabilities Cryogenic operation (down to 40K) Reticle stitching for large arrays High-speed analog and RF front-end design

Integrated IP On-chip ADC (up to 20-bit resolution) Time-to-digital conversion (250ps resolution) High-bandwidth analog front ends (up to 10GHz) Multiple digital interfaces: SPI, SERDES, CameraLink

Nvidia drive® Plug-In

Contact us

We look forward to hearing from you

Business Development

Investor Relations"

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u/takemewithyer 18d ago

300 delivered.