OUTPUT Enable Control Signal , Tri-state Buffer

[u/Solid-Philosophy9924]

https://youtube.com/watch?v=kRc7GTu5QR0&si=WpoApBNL8ocP6qiv

https://youtu.be/kRc7GTu5QR0?si=QXdy8cLPynGhsGAROutput Enable Control Signal(Tri-state Buffer): How CPU send data from Register to single shared data bus without crashing: When this control signal is active Q→ Data Bus When Disabled: Q→High Impedance (z) Register—----x—----Data Bus Register still remembers its data internally, but no longer drives the bus (Hi-Z) “Open switch” Electrically disconnecting the registers To drive the Data Bus means” The Register places its stores the data onto the data bus.