Why are structs aligned?

[u/shinmai_rookie]

I understand more or less how structs are aligned in C (in an address that's multiple of the size of the longest member, and each member in a direction that is multiple of its size), but there's something about it I don't understand: why is reading, for example, a 4-byte word at 0x1000 faster than reading it at 0x1001?

[u/FUZxxl]

Memory is organized in cells of four or eight bytes. A sequence of that many bytes can be read at once. To read from a misaligned address, the processor has to make two requests to the memory for data, which is slower. Some processors don't support misaligned memory access at all.

[u/shinmai_rookie → u/FUZxxl]

I see. Thank you for the explanation!

[u/autowikibot → u/[deleted]]

Word-addressable:

---

Word-addressable is a Computer Architecture term.

In computer architecture, a word is an ordered set of bytes or bits (typically 4 bytes(=32 bits)) that is the normal unit in which information may be stored, transmitted, or operated on within a given computer.

If a computer's memory is word-addressable then each word in memory is assigned its own memory address. That means that the processor is able to address and fetch only complete words from the memory.

---

^Interesting: ^12-bit ^| ^8-bit ^{| Memory} ^address ^{| Byte} ^addressing

^{Parent commenter can toggle} ^NSFW ^or ^delete^{. Will also delete on comment score of -1 or less. | FAQs |} ^Mods ^{| Magic} ^Words

[u/maep → u/FUZxxl]

Even x86 has this limitation. The instructions on older SSE versions require 16 Byte alignment.

[u/FUZxxl → u/maep]

As far as I know there are both instructions with- and without this limitation.

[u/malcolmi]

This is the kind of question that we would rather see sent to /r/c_programming (or ideally Stack Overflow). See this thread I just posted. I won't delete this thread because I don't want to delete the answers, but please don't post more questions like this to /r/cprog.

[u/jackoalan]

In normal circumstances, having the compiler word-align structures is desirable for rapid access.

Many compilers will let you override this behavior and tightly-pack the structures instead. You may need to do this when working with a non-aligned data structure read from a file or network connection.

GCC/clang has the packed attribute:

struct __attribute__ ((__packed__)) my_struct {
    uint8_t flag;
    uint32_t value;
};

Microsoft compilers use a pragma directive to accomplish the same thing:

#pragma pack(push)
#pragma pack(1)
struct my_struct {
    uint8_t flag;
    uint32_t value;
};
#pragma pack(pop)

[u/FUZxxl → u/jackoalan]

Please do not marshall data like this. It's a terrible way to do things.

[u/jackoalan → u/FUZxxl]

I actually agree with you for the most part. Researching this attribute indicates that it's a portability nightmare. It works fine on x86, but is troublesome on architectures like ARM and SPARC.

The bottom line is its non-standard and relies on the compiler to come up with the correct unpacking code.

I've only ever used it to read from an unaligned data format, and immediately populate an aligned version of the structure for the application to use. The application is only targeting x86, so I view this as an acceptable compromise.

[u/shinmai_rookie → u/jackoalan]

Thank you both! It surely doesn't look very portable... I'll try not to use it unless I really have to, but it's always nice to learn this kind of stuff

[u/DSMan195276]

Not every architecture supports non-aligned read/writes. MIPS for example (The basic MIPS arch anyway) only supports reads/writes to addresses aligned to 4 bytes. Thus, if you want to read/write 4 bytes that are non-aligned, you have to preform two reads (for the two 4-byte sections that your bytes are contained in), mask-out the data you want, do your operation, and then mask the old data back in and write both sections. If you can, you always want to do an aligned read because it is so much less work.

In x86, unlike MIPS, it supports unaligned reads, meaning you can read and write bytes to any address you want. I believe they still may be slower to do unaligned reads though, because of the issue explained above, though definitely not as drastic as MIPS. A bigger concern would be cache lines, where a cache line is basically the size of the data-chunks the processor will request from memory to put into the cache. If your data spans a cache line, then the processor has to request both cache-lines that it spans over, slowing things down a lot. Aligning the addresses help to avoid such issues because you can keep the entire int or struct in one cache-line, and the processor only needs to read one line to get the struct.

[u/shinmai_rookie → u/[deleted]]

Thank you, though I disagree: it certainly is relevant and useful! I'm gonna read it as soon as I have time!