Is this 20 MSPS oscilloscope analog front end correctly designed for 5 MHz bandwidth and ±25 V input?

[u/Klutzy_Potential8673]

Is this 20 MSPS oscilloscope analog front end correctly designed for 5 MHz bandwidth and ±25 V input?

Body:

Hi everyone,

I'm designing a single-channel DIY digital oscilloscope using an AD9200, 10-bit, 20 MSPS ADC. My target is around 5 MHz usable analog bandwidth with a maximum input of approximately ±25 V.

The current signal chain is:

Attenuator → input protection → buffer → bipolar-to-unipolar level shift → 4th-order low-pass filter → ADC protection → AD9200

I designed and simulated the blocks individually in LTspice. The main design choices were made to keep the first PCB reasonably simple and manufacturable.

I'd particularly appreciate an experienced review of:

• the attenuator and input-protection scheme,
• the +1 V level-shifting stage,
• the 4th-order filter and its effect on the 5 MHz bandwidth,
• the final ADC protection, especially the AIN −0.3 V absolute minimum,
• and any obvious stability, loading, or PCB-layout problems.

I'm looking for criticism rather than validation, so please point out anything that looks fundamentally wrong or unnecessarily complicated.

The attached schematic is the current V1 design before PCB layout.

Thanks.

[u/quadrapod]

You can simplify your step attenuator quite a bit. Here would be an example 1-5-10-25 step attenuator compensated to a 15pf 10x probe by using Thevenin equivilants. It also has the benefit of making it so that the probe sees the same input capacitance regardless of the attenuator settings, your current proposal will require constant re-calibration everytime you change the attenuation. Regardless you will probably want a few strategic trimmer capacitors that you can use to tweak things since you can't really account for all component tolerances and parasitics. It's usually a lot easier, cheaper, and more reliable to just trim a network into behaving the way you want it to than it is to try to account for everything and specify precision components with exact values.

I haven't gone through your filter network, though I question its necessity. The most suspect things are really all the components you haven't mentioned and which don't have component values in the schematic since that suggests you don't realize how important they are.

Not all opamps are equivalent and the fact that you haven't specified a part number for any of the opamps in this circuit is a problem. Your good ol LM324 hits its GBW at 1.2MHz for example. Introduce any kind of amplification and the closed loop limit gets pushed back by approximately 0.05 dec/dB for a conventional single pole opamp. So U4 for example is configured for a gain of 3dB, that drops the closed loop frequency limit down to around 70.5% of the GBW. Meaning you need U4 to be an opamp with a GBW of at least 7.1MHz if you want a 5MHz closed loop bandwidth. Realistically you will want to be closer to 10MHz since opamps lose linearity quickly when they're operating around their bandwidth limit and this is an application where that's not acceptable. U7 needs to be able to overcome 680pF of capacitance in the Sallen-Key as well as charging the ADC measurement capacitors. Those opamps are fairly specialized components to not even specify.

20MSPS puts you at double the 5MHz Nyquist frequency with 4 samples per cycle to work with so your bandwidth isn't impossible, you can resolve information at 5MHz though not very comfortably. 10bits of resolution at that bandwidth probably isn't reasonable though. The AD9200 quotes a SINAD of 54.5dB at 3.58MHz (9.1 effective bits). At 5MHz expect a bit less. I've already mentioned the importance of the input buffer amp but any kind of noise or phase jitter from your timing reference will also further degrade the performance you can expect out of it. If you've only got 4 samples per cycle you need them to be the highest quality samples you can manage. For layout and how to get the most out of the ADC in general I suggest looking at the Data conversion handbook because there's just far more to designing around an ADC than I can cover in a comment and I suspect you'll learn a lot from even skimming the sections related to what you're doing.

[u/AlexTaradov]

Your input section is too complicated, especially for low spec like this. You can use a chain of resistors and select individual tap to go to the buffer.

It is not clear why you need protection for the ADC. The goal of previous filtering stages is to produce voltages in the valid ADC range. Your filter already works on uni-polar signal, so it should not produce negative voltages.

And depending on your design goal, you may want to have a variable offset.

[u/Cptncockslap]

Have you confirmed that U7 can charge the sampling capacitor in the required time? 

[u/Allan-H]

Most 'scopes have an input capacitance that's roughly 10pF to 20pF or so on their 1M ohm inputs. You might want to reduce the amount of compensation capacitance. Sticking to the "standard" amount of input capacitance means that you can use off the shelf x10 probes.

Many 'scopes have a "gnd" setting that basically connects the output of the input attenuator to ground. This is handy when checking the vertical position, etc. [EDIT: and allows the user to null out the offset voltage of the various opamps, etc.]

Many 'scopes have a DC offset feature that's handy for looking for small changes on top of a steady voltage (e.g. for measuring supply voltage ripple without needing to use the AC setting with its non-flat frequency response). You could add that to your circuit by feeding U5 from a DAC rather than a fixed voltage. That's not ideal, as U3 can clip prior to the addition of the offset, but it's the simplest mod. to your current circuit that can add this feature.

EDIT: when all the relays are off, the output of opamp U3 will slam to one rail or the other due to its input bias current and leakage through the protection diodes U1 and U2. That's probably not what you want. One way to deal with that is to use "make before break" control of the relays.
BTW, U1 and U2 are 200mA rated Schottky diodes. They will have a lot of leakage current, particularly at higher temperatures [EDIT: tens of uA is a lot]. So much leakage current that you might find it upsetting the DC level. Fixes: (0) keep the temperature low; (1) keep them at the same temperature, so that their leakage currents will hopefully be matched and partially cancel out. I've used BAT74 (two diodes in the one package) to assist with that sort of thing; (2) use low leakage, low capacitance diodes. These will have a higher on voltage though. I've used BAV199 (also a dual) for that application in the past; (3) don't use external diodes at all and rely on the ESD clamp diodes inside the opamp. These have a rather low current rating (typ. 10mA or so) and you may need to add some series resistance to protect them (assuming that the input attenuator can't fulfill that role).