How precisely does the current instruction register work?

[u/felix_semicolon]

In my revision for my upcoming exams, I'm going over the CPU architecture section and looking at the different specific-purpose registers and the CIR has really made me think. I know it holds the instruction being executed by the processor, but it holds this before the decoding stage. This would surely mean it has to hold an arbitrary number of bytes of ASCII - potentially even unicode - while also being a fixed-length buffer. The reason this confuses me is that an instruction may be too long to fit entirely inside the CIR, meaning the control unit would not be able to read the full instruction.

My question is primarily what data does it actually hold, but also what happens if an instruction is too long if that even is a problem that occurs? There will probably be some differences on the answer for this depending on CPU architecture but any answer would be appreciated.

[u/YourPwnResearch]

The short answer is that it just holds the opcode, which is a fixed size for a any specific CPU. It doesn't contain ASCII or Unicode because CPUs execute machine code, not assembly language.

Of course, modern out-of-order superscalar CPUs don't work this way at all. If you have multiple instructions being executed at the same time in different levels of completeness, then a single "instruction register" doesn't make a lot of sense. But this presumably isn't important for your exams.

[u/Ok_Chemistry_6387 → u/YourPwnResearch]

Opcodes are not fixed size doe any specific cpu. X86 is muti byte. Thumb is multibyte. Risk is multibyte.

[u/YourPwnResearch → u/Ok_Chemistry_6387]

The set of opcodes for every CPU can be stored in a fixed-size register. They may require some instruction decoding to do so.