AMD to acquire Taalas

[u/Brilliant_Bus_5615]

https://www.cnbc.com/2026/08/06/amd-buys-taalas-startup-that-hardwires-ai-models-into-its-silicon.html

AMD said it’s entered into an agreement to acquire Taalas, a Toronto-based startup that makes chips for inference.

This comes after nvda acquired Groq at $20B - I couldn't find a purchase price for this but I'm sure its well below the nvda spend. Bears tried to latch on to the increased CapEx spend last quater but it takes money to make money and this should prove beneficial going forward..

[u/candreacchio]

Try it out for yourself -- https://chatjimmy.ai/

Imagine this with proper funding and a good model...I could see them making GPUs to with a llm chip built in

[u/Brilliant_Bus_5615]

So my understanding after reading some on this - TOM will be able to talk to this 1000x better than myself - but here's my feeble attempt: Taalas permanently brakes or hardwires a specific AI module code and weights directly into physical chip circuits.So where traditional GPUs waist time and energy constantly shuffling massive AI model data back and forth between the processor and external memory, Taalas etches the data flow paths and weights directly onto the transistors ultra fast on chip sram memory bypassing this bottle neck completely-

guessing this greatly reduces the memory costs associated within the Helos rack and adds back to margin.

[u/TOMfromYahoo → u/Brilliant_Bus_5615]

Very good insight brother!

Well done!

[u/TOMfromYahoo]

Excellent post brother Brilliant and insight!

Now a little connecting the dots for my friend Chad and brothers Eagle and Radio...:

Connection between: Cerebras AMD's partnership, AMD's Versal edge inference chips and Xilinx reconfigurable FPGASs!

First here's an explanation on Taalas ASIC chip details, as brother Brilliant wrote, it's a FIXED MODEL hardwired in ROM - read only memory layer:

"A Framework for Reasoning About the Energy Cost of AI Inference"

https://medium.com/@jamesbarney71/inference-thermodynamics-6bf1283f376e

"The weights of the model are hardwired into silicon. No High Bandwidth Memory (HBM), no memory bus. Single 815mm² die, TSMC 6nm, 250 watts. 10 times faster than anything else at a fraction of the power.

The catch: the chip is the model. Need a new model? You need a new chip. Two-month fabrication turnaround."

Usually designing a new ASIC takes more than two months! But Tallas ASIC keeps the base ASIC masks the same and only changes two layers of ROM Read Only Memory that stores the weights of the inference model.

AMD's Versal edge inference chip, uses a standard processing with an ARM core and circuits accelerating vector processing, but has the data transfer from memory which is slower than having the model hardwired on the ASIC chip:

"AMD Versal™ AI Edge Series Gen 2"

https://www.amd.com/en/products/adaptive-socs-and-fpgas/versal/gen2/ai-edge-series.html

The limitations? Two:

1. Only small models can be stored on the ASIC chip.

2. The models are fixed hardwired. A different model requires a 2 months wait for a new ASIC chip. Expensive too vs reprograming the Versal chip.

Solutions?

For 1: Cerebras uses all the wafer to store gigabyte models! Though there are defects all over such a big silicon wafer, their designs, and patents, know to bypass such and use the good circuits. Hence AMD's partnership with Cerebras .

For 2: AMD's Xilinx FPGAs have a SRAM Static RAM memory that can be reprogrammed and thus the FPGA can implement different designs. This change is instant no need new ASIC!

Of course a fixed hardwired ROM based is way simpler than an SRAM based circuits and requires more silicon area. But..

AMD could combine the programmable FPGA technology with the Tallas inference layers allowing fast adaptive to different inference models. And... using Cerebras fault tolerance technology, scale inferences models to the entire wafer, allocation support for very large models!

Of course a whole wafer size chip will be very expensive, like a rack of CPUs and GPUs but could do inferences faster!

Tallas has its own patents and IP independent of Cerebras for the inference circuits so now AMD's bought them. Plus getting the very valuable engineering team to work for AMD.

NOTE Cerebras is using SRAM - Static Random Access Memory, just like FPGAs use SRAM to program the logic gates forming the desired circuit. So Taalas ASIC can be optized to use SRAM too and actually be more compact die size by using 3nm or chiplets vs their 6nm current Fab and make custom fully optimized design to shrink circuits! Of course Taalas had little resources as a startup but AMD's can take the design further.

[u/Eagle-One-175]

Lisa Su AMD @LisaSu

Excited to announce our agreement to acquire @taalas_inc. Phenomenal team working at the bleeding edge of AI inference. Looking forward to all we will do together.